In most RH850 devices the Local RAM is accessible from different addresses via a core bus and a DMA bus. By default, a faster, DMA bus access is set. Normally the core's Local RAM is accessible at the "self area" address by its core only.
Note that if the download code is linked at the core's Local RAM (self area) address, a download may not succeed because the direct memory access via the debug port may not have access to the RAM at that same address.
1. Navigate to Debug | Configure Session | SoCs | Program Files.
2. Select the file and press Edit.3. Change Memory area to CPU (Load section), which will execute the code, e.g. PE1.Virtual.