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Flash programming
NXP S32K3xx: Variable data flash size 29-Nov-2024
Data flash size of S32K3xx can change depending on Hardware Security Engine (HSE) firmware usage. Flash can have 3 different configurations: HSE firmware usage feature flag is disabled (no HSE firmware) HSE_B firmware usage feature flag is enabled (Full memory HSE firmware - HSE_FULLMEM) A...
NXP S32K14x: Mass erase is not working 26-Nov-2024
Most common reason is using authentication keys when partitioning the FlexRAM to EEPROM. Authenticating and removing this authentication by using CSEc keys is not supported by winIDEA. The partitioning can only be reversed manually. When no authentication keys are used , the EEPROM section...
Arm Cortex: The application does not stop after reset 12-Nov-2024
Possible solution Verify the RESET method selection in the Hardware |CPU Options |Reset. Explanation On Cortex devices internal reset logic can be implemented in various ways. The debug tool must be aware of the reset logic implementation to connect to the target microcontroller and gain c...
Flash programming fails 19-Oct-2024
Possible causes and solutions Use the latest verified build Open the Downloads web page. Wrong CPU selected Double-check the target CPU designation and verify that a matching CPU is selected in Debug |Configure Session |SoCs . CPU is reset by either external watchdog circuitry or internal ...
Arm Cortex-M: Flash programming fails 16-Oct-2024
Check that the Flash memory is not secured or perform a special Unsecure operation (this erases Flash content). This can happen either by intentionally or accidentally writing to the memory locations managing the Flash security levels. Possible solutions Perform Reset action If a device us...
Arm Cortex TMS570: How to write to ECC? 15-Oct-2024
The TMS570 devices feature a Flash memory with optional ECC (Error correcting code) memory generation. ECC is generated in the ECC dedicated sectors, which are separated from the main Flash memory and can be programmed automatically or manually. Solution To be able to program your own ECC ...
Arm Cortex Cypress Traveo II: Supervisory Flash (SFLASH) 05-Aug-2024
Programming of Supervisory Flash is divided into two types of programming: User rows (available in VIRGIN and NORMAL state of SoC) Cypress rows (available only in the VIRGIN state of SoC) To troubleshoot possible issues with Cypress Traveo II use logging via Help | Support | Log. Enable ac...
NXP S32Kxx: Programming Flash memory not possible 02-Aug-2024
When programming Flash memory of the S32K344 SoC using winIDEA version 9.21.109 or older, an error may occur, preventing you from programming the FLASH memory. Possible errors: Error programming UMI error Error loading monitor Possible solution Download the latest winIDEA build .
Arm Cortex ST Stellar: OTP memory programming fails 01-Aug-2024
winIDEA supports ST Stellar and Centauri MCUs like SR6G7 and SR6P7. Their n on-volatile memory (NVM, also Flash) parts, of which some are one-time-programmable (OTP), are represented in winIDEA through programmable memory devices such as CODE, DATA, and the two OTP BCS and UTEST. NVM also ...
Arm Cortex-M Cypress Traveo II: Reset and Flash programming fails 01-Aug-2024
If any issues with Cypress Traveo II occur, e.g.: Debug connection fails to establish Reset fails Flash programming fails Attaching to a core fails etc. follow the below procedure to troubleshoot. Possible solution 1. Enableloggingvia Help | Support | Log . 2. Check activity (27) EVE . 3. ...
Arm Cortex Cypress Traveo II: Reading from a Work Flash results in random data 01-Aug-2024
Work Flash is a flash memory used to store data (code storage for user application execution and local data storage/update for SoC-based systems). Work Flash is a part of the eCT Flash. Reading from a Work Flash that is still in an erased state will result in random data in the Memory Wind...
Arm Cortex-M: Application does not run correctly after download into Flash 01-Aug-2024
Two different applications (A and B) are added into a winIDEA workspace. Application A is debugged and then Application B is downloaded and debugged. Once the Application B is downloaded the core is not stopped on the correct reset vector. Running the core from this state results in Hard F...