Open the Downloads web page.
Double-check the target CPU designation and verify that a matching CPU is selected in Debug | Configure Session | SoCs.
Disable all reset sources during debugging. More information is available in Active Watchdog issues.
The exceeded limit can result in failed programming or data corruption (not very likely but it is possible): Try performing Flash programming on another target featuring the same MCU/FLASH device.
Replace the CPU or use another target for a test.
Refer to the SFR Selection chapter for more information about controlling the SFR database location and behavior.
Refer to How to configure max debug frequency topic to ensure that under all circumstances the debug communication will work reliably.