When the AURIX is reset with the debugger connected and the Hardware Security Module (HSM) is enabled in the User Configuration Block (UCB), the boot code of TC2xx / TC3xx sets a breakpoint to HSM’s first instruction. This stops the HSM core from running and if the primary core expects the HSM to run, the synchronization between the boot core and the HSM core in the application will fail.
It is recommended that you use the latest verified winIDEA build.
1. Enable Synchronize selected cores (stop/run) when possible via Hardware | CPU Options | Debugging.
2. Enable the following options for cores you want to be automatically synchronized via Hardware | CPU Options Cores | HSM:
This is the preferred solution and can be used in winIDEA 9.21.134 or higher.
1. Open Hardware | CPU Options | Cores | HSM.
2. In Debug entry type select Force run.