Infineon AURIX: How to release Watchdog from the suspend mode?

When AURIX devices are in debug mode, Watchdog is enabled by default, but the Watchdog Timer is unconditionally suspended (stopped), which means that the Watchdog never resets the chip.

To use the Watchdog during debugging, you have to disable the Watchdog Timer suspended logic (or enable the Watchdog timer).  

Solution

To enable the Watchdog Timer you have to set WDTSUS (Watchdog Timer Suspension Control) in the CBS_OCNTRL register. In this case, the Watchdog Timer suspend mode is controlled by the TL1 line.

1. Configure multi-core synchronization by enabling the checkbox in Hardware | CPU Options | Debugging | Synchronize selected cores (stop/run) when possible.

2. (optional) Remove some cores from synchronization by selecting the No option in Hardware | CPU Options | Cores | <CoreName> | Synchronize this core.

2. Create a new INI script and add it to the Initialize fields in Hardware | CPU Options | Reset:

• Initialization before Programming (for enabling the watchdog on Download)
• Initialization before Debug session (for enabling the watchdog on Reset)
• Initialization at Attach (for enabling the watchdog on Hot Attach)

   The script should contain the following line:

A CBS_OCNTRL L 0x00003000   //Sets WDTSUS