Possible causes and solutions
CPU reset caused by either External Watchdog circuitry or internal CPU watchdog
Disable all reset sources during debugging to resolve the issue. More information is available in Active Watchdog issues.
F1H, F1Kx: UMI Error R_FCL_ERR_FLMD0 FLMD0-Pin not at high level. Error code = 0C / 0000
Enabled ICUM prevents access to Flash through PE1. Before any Flash operation, ICUM must be disabled.
winIDEA version 9.21.247 or newer supports Flash operations when ICUM is enabled.
P1x-C: UMI Error, R_FAD_ERR_FCUTRNS Transfer to FCU firmware failed
Make sure that ICUM is disabled.
P1x-C: UMI Error, R_FAD_ERR_CLOCK The CPU clock frequency is incorrect
Refer to Renesas RH850 / P1x-C: UMI Error, R_FAD_ERR_CLOCK The CPU clock frequency is incorrect topic.
Sector/mass erase operation fails
Caused by issues in older winIDEA:
winIDEA version 9.17.151 and older: A lockbit could be set on code Flash sector that causes UMI error R_FCL_ERR_WRITE Flash write error in that sector.
- Enable Disable Lock Bits option
in Hardware | Flash device.
- Disable Use hash verification.
- Perform Mass erase with Hardware | code FLASH device | Mass erase.
The DisableLockBits option disables the lock bits before erasing the flash. If this option is disabled and the flash sectors are locked, the erase operation fails.
Check this general topic on Flash programming.
More resources in winIDEA Help