Categories

Storage device programming
NXP S32K3xx: Variable data flash size 29-Nov-2024
Data flash size of S32K3xx can change depending on Hardware Security Engine (HSE) firmware usage. Flash can have 3 different configurations: HSE firmware usage feature flag is disabled (no HSE firmware) HSE_B firmware usage feature flag is enabled (Full memory HSE firmware - HSE_FULLMEM) A...
NXP S32K14x: Mass erase is not working 26-Nov-2024
Most common reason is using authentication keys when partitioning the FlexRAM to EEPROM. Authenticating and removing this authentication by using CSEc keys is not supported by winIDEA. The partitioning can only be reversed manually. When no authentication keys are used , the EEPROM section...
Arm Cortex-M: Locked/secured device 18-Nov-2024
Possible solution 1. Select Debug |Prepare to Attach . 2. If using Hot Attach, follow the Hot Attach procedure to safely attach to the Target. 3. Select Hardware |Scripts |Unsecure (can also be Chip Erase or similar). This operation needs JTAG/SWD debug port to be accessible. Devices, wher...
How to reach maximum Flash programming performance? 06-Nov-2024
Programming applications to a microcontroller can take a lot of time, especially if the application is large, the storage device is external memory and the data rate is slow. Possible solutions Minimize download time - general settings Check the frequency of the debug interface and set up ...
UMI errors in winIDEA 24-Oct-2024
With devices supported by UMI,we often encounter UMI-related errors when performing a Download, writing through the Memory Window , or even performingMass erase. This topic explains the most common possible solutions and UMI errors, reported by both the monitor(running on the target SoC) a...
Infineon AURIX TC3xx: How to inject ECC error to PFLASH 19-Oct-2024
The scripts TC3xx_PFLASH_Inject_ECC_error.py and TC3xx_DFLASH_Inject_ECC_error.py , which are distributed with winIDEA, program a memory page to either PFLASH (address 0xA0000000) or DFLASH (address 0xAF000000).Then they turn auto ECC code generation OFF and use the same codefor reprogramm...
Flash programming fails 19-Oct-2024
Possible causes and solutions Use the latest verified build Open the Downloads web page. Wrong CPU selected Double-check the target CPU designation and verify that a matching CPU is selected in Debug |Configure Session |SoCs . CPU is reset by either external watchdog circuitry or internal ...
NXP/ST Power Architecture: When running the code it doesn’t reach main function 17-Oct-2024
When running the code after the download, it never reaches the main function. FLASH programming doesn’t report any verify error. Possible solution Simple manual Mass erase via Hardware |FLASH |Mass Erase before debug download may solve the problem already. Most probably the application rem...
Renesas RH850: Using ICUM as a boot core and unable to download 17-Oct-2024
When the ICUM is enabled flash erase and program operations are not possible. ICUM-protected setup requires a custom procedure to perform a download. Note that disabling and re-enabling the ICUM is not necessary if a download files' image is unchanged. Python scripts are available per requ...
Infineon AURIX / TC3xx: Rejecting FLASH operation. Start address not valid 17-Oct-2024
winIDEA checks if the start address from the Symbol file (ELF file) points to the same address specified in the STAD (Start address) field of any valid UCB (UCB_BMHDx_ORIG or UCB_BMHDx_COPY, BMHDx for x=0, 1, 2, 3). If it doesn’t, FLASH programming is rejected and a warning appears: Error ...
Arm Cortex-M: Flash programming fails 16-Oct-2024
Check that the Flash memory is not secured or perform a special Unsecure operation (this erases Flash content). This can happen either by intentionally or accidentally writing to the memory locations managing the Flash security levels. Possible solutions Perform Reset action If a device us...
Arm Cortex TMS570: How to write to ECC? 15-Oct-2024
The TMS570 devices feature a Flash memory with optional ECC (Error correcting code) memory generation. ECC is generated in the ECC dedicated sectors, which are separated from the main Flash memory and can be programmed automatically or manually. Solution To be able to program your own ECC ...
Renesas RH850: Speed up the Flash programming 19-Sep-2024
To increase the Flash programming speed, you can use initialization files from pre-configured winIDEA Workspace Examples. Solution 1. Download winIDEA Example Workspaces . 2. Select a suitable Workspace. 3. The initialization file is by default added in Hardware | CPU Options | Initializat...
Infineon AURIX: How to disable Flash protection? 11-Sep-2024
Using dedicated initialization scripts, winIDEA can temporarily unprotect (and resume) Program Flash (PFLASH) Data Flash (DFLASH) Boot Mode Header Location (BMHD) before performing flash read/write operations into these areas. Flash protection password can be also entered as a script param...
Active Watchdog issues 14-Aug-2024
When an active External Watchdog / System Basis Chip (SBC) or Internal CPU Watchdog is not serviced properly, i t can cause problems such as: Unintended reset during Flash programming or Mass Erase operation Error 258:Failed to initialize debug session BlueBox loses control over the CPU af...
Mass erase doesn't work 14-Aug-2024
When trying to perform a Mass Erase of the chip, you get an error, e.g. UMI error. Formass erase to work, the CPU should be stopped. In case you have a multi-core device, the non-primary cores should be stopped as well. Possible solutions Enable theAllow mass erase option Enable this optio...
Renesas RH850: Flash programming fails 14-Aug-2024
Possible causes and solutions CPU reset caused by either External Watchdog circuitry or internal CPU watchdog Disable all reset sources during debugging to resolve the issue. More information is available in Active Watchdog issues . F1H, F1Kx: UMI Error R_FCL_ERR_FLMD0 FLMD0-Pin not at hig...
NXP S32Kxx: Programming Flash memory not possible 02-Aug-2024
When programming Flash memory of the S32K344 SoC using winIDEA version 9.21.109 or older, an error may occur, preventing you from programming the FLASH memory. Possible errors: Error programming UMI error Error loading monitor Possible solution Download the latest winIDEA build .
Arm Cortex-M Cypress Traveo II: Reset and Flash programming fails 01-Aug-2024
If any issues with Cypress Traveo II occur, e.g.: Debug connection fails to establish Reset fails Flash programming fails Attaching to a core fails etc. follow the below procedure to troubleshoot. Possible solution 1. Enableloggingvia Help | Support | Log . 2. Check activity (27) EVE . 3. ...
Arm Cortex Cypress Traveo II: Reading from a Work Flash results in random data 01-Aug-2024
Work Flash is a flash memory used to store data (code storage for user application execution and local data storage/update for SoC-based systems). Work Flash is a part of the eCT Flash. Reading from a Work Flash that is still in an erased state will result in random data in the Memory Wind...
Arm Cortex-M: Application does not run correctly after download into Flash 01-Aug-2024
Two different applications (A and B) are added into a winIDEA workspace. Application A is debugged and then Application B is downloaded and debugged. Once the Application B is downloaded the core is not stopped on the correct reset vector. Running the core from this state results in Hard F...
Infineon AURIX: How to enable or disable debug password protection? 04-Jun-2024
The UCB Flash must be writable to configure the debug password protection. Using this procedure you may lock the device! Possible solution 1. Configure winIDEA to use a password via Hardware | CPU Options | SoC. 2. S et a password. Refer to the winIDEA Help Password protection chapter for ...
NXP/ST Power Architecture: Rejecting FLASH operation. No valid entry address in RCHW 30-May-2024
Before performing a FLASH download, winIDEA verifies if the Entry point address specified in the Symbol file (ELF file) matches the Application start address specified in the first valid RCHW record of the download image. If this doesn't match, FLASH programming is rejected and a warning i...
NXP/ST Power Architecture / ST SPC58: Flash mass erase on HSM enabled device 29-Mar-2024
When Alternate Flash Programming Interface is set, only the HSM core has access to HSM code and data flash. Erased HSM code flash does not contain valid HSM boot headers, therefore HSM core remains in reset state forever, and flash monitor cannot be executed there. As a consequence the HSM...