Arm Cortex NXP LPC: Internal Flash Programming
The debugger programs the code directly into the internal Flash memory through the standard Debug Download and based on the selected CPU:
- Identifies which code from the download file fits into the internal Flash.
- Loads it to the Flash through the flash programming procedure.
The Flash programming procedure is implemented using the NXP IAP (In-Application Programming) interface, already part of the CPU Flash Boot Loader firmware. All other code allocated outside of the Flash boundaries is downloaded to the target through standard memory writes.
The proper CPU must be selected in the Debug | Configure Session | SoCs since the corresponding Flash programming procedure is selected based on the selected CPU.
IAP commands use 32 bytes of space in the top portion of the on-chip RAM for execution. Your program should not use this space.
Download verify exclusion
Due to the CPU requirements, winIDEA:
- Extracts the necessary interrupt vectors from the download file before programming a 32-bit value to the 0x1C address
- Makes the 2’s complement of the check-sum of these vectors
- Programs the calculated value to the 0x1C address
This yields the CPU starting from the code after the reset.
Consequently when Verify in Debug | Configure Session | SoCs | Startup is configured, it’s executed after the Debug Download. This would normally lead to the system displaying an error at address 0x1C since the programmed value doesn’t match the one in the download file. You can ignore this error or adjust the download file so that a 32-bit value at the address 0x1C contains a proper value, which results in the CPU executing your code after the reset.
Possible solution
An alternative would be to skip verifying 4 bytes at address 0x1C.
1. Open Debug | Configure Session | Applications | Memory Actions.
2. Add the range to skip.
