NXP/ST Power Architecture: SFR access and peripheral module power status

When accessing SFRs on MPC5xxx / SPC 5x devices problems occur.  

Possible solution

1. Check if clock(s) for peripheral modules are switched on. 

2. Use the initialization sequence in the Hardware | CPU Options | Reset dialog to enable access to the peripheral modules.

3. Add this write also to the application startup code since the issue is not related to the debugging only.

After reset, peripheral modules are powered off to save power. If these peripheral registers are read by the application or the debugger, a bus error is generated and the CPU gets stuck.

Use case 1

For the Bolero device with 512KB internal FLASH, write 0x80808000 to the CGM_SC_DC0 register (address 0xC3FE037C) before accessing any SFR. This switches on clocks for all peripheral modules. 

Use case 2

Some devices have more CGM_SC_DCn registers controlling microcontroller peripheral modules. For instance on one ST device, additionally 0x000000FE needs to be written to the ME.RUNPC[0].R to make things work.