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Trace
Arm Cortex-M: Trace on STM32H7 09-Dec-2024
CPUSTM32H7 runs at a max. 480 MHz. If dividing the trace, it is possible to get about 100 MHz (supported by the BlueBox) which can cause problems with Flash. For a successful Trace do not stop the Analyzer and CPU simultaneously. Possible solution Stop the Analyzer before CPU: 1. Start Ana...
Arm Cortex: ITM Trace limitations via Terminal Window 28-Nov-2024
Printing characters via ITM can result in all the characters not being displayed in the Terminal Window. For example, here's an ITM message ("\nTEST_12345678") and some possible outputs: Explanation Tracing (observing theTerminalWindow falls under this category), is a non-intrusive operati...
Arm Cortex Energy Micro EFM32: Trace port configuration 28-Nov-2024
GPIO port selection for Energy Micro EFM32 trace initialization is configured as script arguments in the CPU Options dialog. The script is distributed with winIDEA in the SFR folder. Possible solution 1. Add the custom script TraceInit_EFM32xxxx_a.cpp to Hardware | CPU Options | Analyzer |...
Arm Cortex Infineon XMC4xxx: Trace port settings 28-Nov-2024
Trace port settings are only applicable on devices that support parallel trace. GPIO port selection initialization is configured as script parameters. The script is included in the winIDEA SFR folder. If older workspaces are in use, ports have to be configured again. Possible solution 1. A...
NXP S32K31x: Trace recording is incomplete and it shows synchronization errors 26-Nov-2024
Trace recording is incomplete because of the big gaps in time and trace message number, with ITM Synchronization lost messages in between.This typically happens due to the SWO clock instability, or too high of SWO data rate. Possible solution 1. Update to the latest winIDEA version . 2. Ad...
Arm Cortex-M: How to manually configure DWT Data Comparator 1? 06-Nov-2024
For specific use cases and linking the Comparator 1 winIDEA offers manual configuration of the DWT module . Use cases cover comparing values on Address or/and Data with an option Ignore LSB bits: 1. Address Compare on Address on Data Access Compare on Address Range on Data Access 2. Addres...
Arm Cortex: Starting trace while cores are running produces undesired trace messages 24-Oct-2024
If you start tracing while a core is running, the sequential configuration of trace components might produce undesired artifacts in the trace stream (e.g. considerable amount of ITM trace before ETM messages start). Note that Cortex trace does not have a global trace switch that "turns on ...
Arm Cortex: Parallel trace doesn't work after switching applications 19-Oct-2024
On many Arm devices, the trace clock is directly related to the CPU clock set by your application.Be aware of this dependency when using the same winIDEA workspace to trace different applications, as it is possible that values from a previously performed trace line calibration may not work...
NXP S32K344: Unstable or not working parallel trace 06-Aug-2024
By default the fast internal RC oscillator (FIRC) is used for generating the trace clock.The resistor and capacitor values(RC components) of this oscillator show significant tolerances due to the nature of themanufacturing process and also vary upon differences in supplied voltage and work...
NXP S32K14x: No trace output on the SWO pin 02-Aug-2024
Trace is initialized in the user application, but the trace output does not appear on the SWO pin when the target is used in standalone mode (i.e. not connected to a BlueBox debugger). Explanation On Arm Cortex devices the SWO trace pin can only be used in combination with SWD (Serial Wire...
Arm Cortex: How to configure Analyzer and capture STM messages? 01-Aug-2024
Below configuration explains Arm System Trace Macrocell (STM) which is for example implemented in Renesas R-Car Gen3 SoCs. However, a similar approach can be applied to NXP SoCs, such as S32G. The use case is taken from a webinar that focuses on the profiling of a boot-up process on Cortex...
Arm Cortex-M / SWO trace: A variable is not recorded from the beginning 01-Aug-2024
Errors like missing data, no trace messages shown in the terminal window, or data displayed at the wrong address in the trace recording can be a result of SWO tracing during the PLL initialization. SWO trace during the PLL ( Phase-Locked Loop) initialization is not supported by winIDEA. Po...
ARM Cortex-M0+: How to configure MTB trace? 01-Aug-2024
Solution Refer to Configure Micro Trace Buffer (MTB) trace in winIDEA Help. More resources in winIDEA Help Micro Trace Buffer (MTB) Analyzer Operation mode
Arm Cortex ETMv4: Program trace is recorded when only data trace is selected 15-Jul-2024
Devices that feature anETMv4(such as most devices of the S32K3xx family) include program trace when it is configured to output any data trace. The ETM is used even when exclusively selectingDatain the Profiler Configuration or when using theTrace Wizardto record only data trace. As a resul...
Infineon TriCore TC3xx: Manual Trigger Configuration not shown 02-Jul-2024
Analyzer Manual Hardware Trigger configurations (TRD) created in winIDEA versions 9.21.134 or above may not show when transitioning to newer winIDEA versions. Possible solution 1. Open winIDEA version 9.21.133 or below. 2. Go to File | Save as and save the TRD file. 3. Open a newer version...
Error: Trace is not licensed 05-Jun-2024
When starting a new Analyzer session, winIDEA displays an error message, although a l icense for the trace is purchased. Possible solutions Determine what trace technology is available on your target Open Hardware | CPU Options | Analyzer and check if the trace Operation mode can not be se...